ProtectionAcademy
3.260 min · Advanced

IBR Fault Response & Ride-Through

Dual-sequence current control, PLL phase jumps, and IEEE 2800 / PRC-029.

You will be able to
  • ▸Contrast clamped IBR fault current with synchronous-machine fault current
  • ▸Allocate ΔIq₁ and ΔIq₂ inside the I_max limit with correct priority
  • ▸Check the I₂ lead angle against the 90°–100° window
  • ▸Explain how a phase-angle jump can trip a PLL — the Odessa lesson
Standards
IEEE 2800-2022NERC PRC-029-1NERC PRC-024-4NERC PRC-028-1NERC PRC-030-1
Intuition

The inverter decides how much fault current to make

A synchronous generator can't help making fault current: its magnetic flux pushes current into a fault whether you want it to or not. An inverter is different. It is a fast switching power supply with a control computer deciding, every few tens of microseconds, what current to produce. Its semiconductors (IGBTs or SiC MOSFETs) are destroyed within milliseconds if overloaded, so the controls limit output to typically about 1.0–1.5 pu of rating, whatever the fault. The limit is set by the OEM (utility-scale PV inverters are commonly 1.1–1.2 pu, BESS converters are often specified at 1.2–1.5 pu), and it applies after a sub-cycle transient that can be higher, before the current controller acts. Take the actual value, and how it is split between sequences, from the OEM short-circuit model.

The direction of that current is also a design choice. During a fault the controller can produce mostly reactive current to hold voltage up, mostly active current, or (in older designs) stop altogether. Grid codes now specify that choice.

Gas-fired synchronous (CTG)Solar PV / BESS (full-converter IBR)
What sets fault currentFlux decay through X″d → X′d → Xd and rotor inertiaControl loops and the current limit
Typical magnitudeSeveral pu at the machine terminals, decaying, with DC offsetTypically ≈ 1.0–1.5 pu of rating (OEM current limit), after a sub-cycle transient that can be higher
Fault current angleLags by the network angle (~75–85°)Whatever the controls command (reactive priority by default under IEEE 2800)
Zero sequencePresent if the GSU HV winding is grounded wyeNone from the inverter itself. Whether the pad-mount is a collector zero-sequence source depends on its HV connection (see the configurations table in Module 1.2)
Operating quadrantsP export; leading/lagging QPV: P export + Q. BESS: four-quadrant (charges and discharges)
Lab 1

Seeing the difference in the waveform

The lab below puts a synchronous machine and an inverter side by side, each on its own rating base. Set the inception angle to 90° for the worst DC offset, then make the fault shallower with the residual-voltage slider. The machine's current falls a lot. The inverter's barely moves, because it is already at its limit.

Interactive lab
Fault Current: Synchronous Machine vs Inverter
Both sources carry 1.0 pu load, then a fault depresses their terminal voltage. Compare the decaying, offset machine current with the firmware-clamped inverter current, both in pu of each unit's own rating.
0.20 pu
0 = bolted fault at the terminals
Synchronous machine
0.15 pu
80 ms
90°
90° → maximum DC offset
Inverter (IBR)
1.15 pu
12 ms
1.5 pu
Instantaneous phase current (first 12 cycles)
050100150200-15-10-5051015Time (ms)i (pu)fault
RMS envelope over 2 s
00.511.5202468Time after fault (s)I rms (pu)51 pickup
Synchronous machineIBROvercurrent pickup
Sync peak (asym.)
13.67pu
instantaneous, incl. DC offset
IBR peak
1.63pu
instantaneous
Peak ratio
8.4×
asym. sync ÷ IBR, not an RMS ratio
IBR Ip / Iq (steady)
0.00 / 1.15pu
Synchronous: overcurrent element picks up
IBR: never reaches pickup: overcurrent cannot see this fault

The machine model uses representative constants (E = 1.0 pu behind X″d from the slider, X′d = max(X″d + 0.05, 0.25) pu, Xd = 1.8 pu, T″d = 30 ms, T′d = 0.8 s) with no pre-fault loading correction, so treat its numbers as illustrative. The peak ratio readout compares instantaneous peaks: the synchronous peak includes the DC offset, so it overstates the ratio of symmetrical RMS currents by the asymmetry factor, up to nearly 2× at a 90° inception angle.

Rules

IEEE 2800-2022 and NERC PRC-029-1 in one page

After several large disturbances in which many inverter plants tripped or stopped injecting current during ordinary transmission faults, the industry changed its expectation. IBRs are now expected to stay online and help. The main documents are:

  • IEEE Std 2800-2022: interconnection and interoperability requirements for transmission-connected IBRs. Clause 7 covers ride-through and fault response, and Clause 11 covers measurement and monitoring. Requirements apply at the reference point of applicability (RPA), usually the POI/POM.
  • NERC PRC-029-1: mandatory frequency and voltage ride-through requirements for IBRs. PRC-028-1: disturbance monitoring equipment at IBRs. PRC-030-1: identifying and analysing unexpected IBR output reductions, with corrective action plans.
  • NERC PRC-024-4: frequency and voltage protection settings, now only for synchronous generators, Type 1/2 wind and synchronous condensers. IBRs moved out of PRC-024 and into PRC-029-1.

Points a P&C engineer has to design around:

  • Plant protection (27/59/81, inverter self-protection, PPC logic) must not trip inside the ride-through envelope. Settings that used to be "conservative" can now be violations.
  • The plant must ride through phase-angle jumps (this course's research cites up to 25° at the RPA under IEEE 2800; verify against the standard) and specified RoCoF without spurious tripping, and frequency for protection should be measured over a window of several cycles, not instantaneously.
  • Tripping for repeated voltage dips (auto-reclose, sequential clearing) is allowed only beyond defined counts within defined time windows. Encode those counters exactly as written in the governing text and do not invent your own. PRC-029-1 has its own multiple-excursion provisions, which may differ from IEEE 2800: PRC-029-1 is mandatory, and IEEE 2800 applies as adopted by the TO, so apply whichever governs.
  • During low-voltage ride-through the default is reactive-current priority, with dynamic positive- and negative-sequence current injection.
  • Momentary cessation (stopping current injection during a disturbance) is restricted inside the mandatory-operation regions of IEEE 2800 and PRC-029-1, and permitted only where the standards allow it. Quote the exact voltage boundary and any legacy-equipment exemptions from the governing standard, not from this summary.
Lab 2

Dual-sequence current control

The inverter's sequence analyser splits terminal voltage into V1V_1 and V2V_2 within a cycle or so, and the current controller then regulates both sequences. The lab uses the following example control law. It is a common OEM-style form, not text quoted from IEEE 2800:

ΔIq1=K1 (1−V1)(V1<0.9),ΔIq2=K2 V2,∠I2−∠V2∈[90∘, 100∘]\Delta I_{q1} = K_1\,(1 - V_1)\quad(V_1 < 0.9), \qquad \Delta I_{q2} = K_2\,V_2, \qquad \angle I_2 - \angle V_2 \in [90^\circ,\,100^\circ]

Positive-sequence reactive current raises V1V_1. Negative-sequence current leading V2V_2 by about 90° behaves like a reactance in the negative-sequence network, which pulls V2V_2 down and makes the IBR's I₂ look more like a machine's. All of this has to fit inside the current limit. The lab uses the conservative bound ∣I1∣+∣I2∣≤Imax|I_1| + |I_2| \le I_{max}, which caps the worst phase current.

When the limit binds, priority rules decide what is curtailed. Under reactive priority active current goes first. If reactive current alone exceeds the limit, the two reactive components are reduced together. A rule commonly drawn from IEEE 2800 keeps the positive-sequence increment at least as large as the negative-sequence increment (ΔIq1≥ΔIq2\Delta I_{q1} \ge \Delta I_{q2}). Read the exact clause text before encoding it in a specification.

The angle window comes from IEEE 2800-2022 Clause 7.2.2.3.4 (negative-sequence current injection): I₂ should lead V₂ by about 90°–100° for full-converter IBRs, and the standard allows a wider 90°–150° band for Type III (doubly-fed) wind turbines (both bands are taken from secondary summaries of the clause; verify against the clause text). A likely reason for the wider band is that a doubly-fed machine's rotor-side converter can't fully control the stator's negative-sequence current. That wider band is the lighter wedge on the lab's gauge. IEEE 2800 specifies response times and priority behaviour, not a mandated K-factor: the gains (K₁ = K₂ = 2 here is only an example), deadbands and the high-voltage absorption limit are set by the OEM to meet the TO's interconnection requirements. In this example law ΔIq₁ switches on below 0.9 pu (so it steps to 0.1·K₁, or 0.2 pu at K₁ = 2, at the threshold; the same step occurs at the 1.1 pu absorption threshold), ΔIq₂ has no deadband, and absorption in the high-voltage region is capped at 0.3·Imax.

Interactive lab
IBR Dual-Sequence Current Allocator
Pick a fault and watch the controller split its limited current between positive-sequence reactive support (ΔIq1), negative-sequence reactive current (ΔIq2) and active current. Then let a "firmware update" drift the I₂ angle and see compliance fail.
Fault preset
0.72 pu
0.24 pu
2.0
2.0
1.15 pu
1.00 pu
Current priority
95°
0°
Simulates an OEM update that changes the sequence-control angle
Sequence voltages
0°90°180°-90°V₁V₂
Injected sequence currents
0°90°180°-90°I₁I₂
Phase currents
0°90°180°-90°IaIbIc
Type III: 90–150°V₂ ref90–100°I₂ leads V₂ by 95°
Current budget (|I₁| + |I₂| ≤ Imax)
|I₁| (Ip, Iq₁)|I₂|Imax
Ia
1.12
Ib
0.36
Ic
0.81
ΔIq₁ req → applied
0.56 → 0.56pu
ΔIq₂ req → applied
0.48 → 0.48pu
Active current Ip
0.37pu
curtailed from 1.00
Max phase current
1.12pu
I₂ angle compliant (95°)
ΔIq₁ ≥ ΔIq₂ satisfied
Within Imax
Lab 3

Phase jumps, PLLs and the frequency trap

An inverter has to know the grid angle to synchronise its current. A phase-locked loop (PLL) tracks it by rotating its own reference until the q-axis voltage is zero. When a fault suddenly shifts the voltage angle, the PLL has to slew to catch up, and while it slews its estimated frequency swings hard.

A frequency element measuring over a window TwT_w treats a phase step Δφ\Delta\varphi as an apparent frequency excursion:

Δfapparent≈Δφ/360∘Tw\Delta f_{apparent} \approx \frac{\Delta\varphi / 360^\circ}{T_w}
Interactive lab
PLL Phase-Jump & Frequency Measurement Simulator
A synchronous-reference-frame PLL (PI loop, ζ = 0.707) tracks the grid angle. At t = 100 ms a fault causes a voltage dip and an instantaneous phase jump, optionally followed by a real RoCoF ramp. Compare the inverter's raw PLL frequency with a relay measuring frequency over 1 cycle and over a 3-cycle window.
25°
0 Hz/s
Real frequency change, applied for 0.4 s
0.50 pu
Low voltage reduces the PLL loop gain
30 Hz
Inverter internal frequency trip
2.0 Hz
0 ms
Plant 81U / 81O relay
Measurement window
57.5 Hz
61.8 Hz
0 ms
Measured frequency
01002003004005006007005055606570Time (ms)f (Hz)INV TRIP
True frequencyInverter PLL (raw)Relay, 1-cycle windowRelay, 3-cycle window81U/O pickups
PLL phase error (θ − θ̂)
0100200300400500600700-40-2002040Time (ms)deg
Peak Δf PLL raw
9.14Hz
Peak Δf 1-cycle
4.17Hz
theory ≈ 4.17 Hz
Peak Δf 3-cycle
1.39Hz
theory ≈ 1.39 Hz
Max phase error
25.0°
Inverter internal frequency protection: TRIPS at 100 ms on a measurement artefact
Plant 81 (3-cycle window): rides through · a 1-cycle window would have tripped
Ride-through failure: the plant disconnected because frequency was measured over too short a window or too aggressively.

The PLL in this lab is a teaching loop: its raw frequency includes the proportional term and isn't amplitude-normalised, so the size of its spike says nothing about any OEM's frequency-trip filtering. The window arithmetic above is the transferable part.

Things to try:

  • Raise the PLL bandwidth: tracking is faster, but the raw frequency spike grows. Lower it and the phase error persists longer.
  • Lower the dip voltage: the loop gain falls with V, so the PLL slows down during the very event it has to track.
  • Add a 5 Hz/s RoCoF. That is a real frequency change, and the 81 element is supposed to see it.
History

What Odessa actually taught us

NERC and Texas RE investigated the 2021 and 2022 Odessa disturbances in West Texas. Normally cleared transmission faults were followed by large, unexpected reductions in output across many solar plants. The reports found several causes, not one:

  • Inverter PLL loss-of-synchronism tripping on phase jumps.
  • Inverter AC overcurrent and DC-side protection (e.g. DC bus voltage) operating during the fault transient.
  • Instantaneous or erroneous frequency measurements tripping on transients.
  • Momentary cessation and slow active-power recovery, plus PPC interactions.
  • Plant-level AC under/overvoltage settings and feeder protection that did not match equipment capability.

Several of NERC's subsequent IBR disturbance reports repeat the last point (verify the specific events and findings against the reports before citing them): plant-level feeder and collector protection set inside the inverters' own capability tripped healthy generation. The collector relays you set are part of the ride-through problem, not just the inverters (see the feeder-island discussion in Modules 1.2 and 2.2).

Interactive lab
Voltage Ride-Through Envelope Checker
The shaded band is a representative, simplified must-ride-through region measured from the start of a disturbance. It is not the normative table, so use the IEEE 2800-2022 ride-through tables and the NERC PRC-029-1 attachments for real work. Set the plant's own 27/59 elements and check whether they trip inside the region.
Disturbance
Plant undervoltage (27)
0.80 pu
0.50 s
Plant overvoltage (59)
1.150 pu
0.10 s
01234500.20.40.60.811.2Time (s)V at RPA (pu)may tripmust ride through27 TRIP 0.70 s
Representative ride-through boundaryVoltage at RPA27 pickup59 pickup
Plant trip
27 @ 0.70 s
Left envelope
never
Violation: plant protection tripped while the voltage was still inside the must-ride-through region.

The envelope in this lab is a representative approximation, not the normative table. It models single-stage definite-time 27/59 on one voltage magnitude and has no repeated-dip counters, so it can't check the consecutive-deviation rules discussed above. Those have to be checked against the governing standard (Module 4.3).

Beyond grid-following

Grid-forming inverters behave differently

Everything above describes grid-following (GFL) inverters: a PLL locks to the grid voltage and the controller injects a commanded current. Grid-forming (GFM) converters, increasingly specified on new BESS projects, instead regulate an internal voltage and angle and behave like a voltage source behind an impedance, within their current limit.

  • In the first cycles of a fault a GFM converter responds immediately, like a machine, rather than after a PLL and current loop act. Once it hits its current limit it falls back to a current-limited mode that can look much like a GFL plant.
  • Its negative-sequence behaviour depends on whether the OEM forms a balanced voltage (which presents a low negative-sequence impedance, so it carries I₂ naturally, like a machine) or limits I₂ to protect the converter. Don't assume the GFL 90°–100° behaviour. While a GFM converter is current-limiting, the angle of its fault current can also be OEM-specific, which matters for the directional and phase-selection elements in Module 4.1.
  • Requirements for GFM performance are still emerging. Treat the OEM model and the TO's requirements as the source of truth, and re-check any protection that relies on IBR sequence currents (Module 4.1) when a GFM plant is involved.
Studies

How IBRs are modelled for protection studies

Protection settings are only as good as the fault model behind them. An IBR can't be represented as a voltage behind X″d: it is a voltage-dependent current source whose output depends on the terminal voltage it sees, which in turn depends on its output.

  • Phasor short-circuit programs (ASPEN OneLiner, CAPE, PowerFactory and similar) represent IBRs with OEM-specific or generic models of IEEE 2800-compliant behaviour (IEEE 2800 does not define a model form), as tables or control equations of current versus voltage, and solve them iteratively. Generic models are a starting point, not a substitute for the OEM's.
  • EMT models (PSCAD and similar), supplied by the OEM as compiled real-code models, capture the sub-cycle transient, PLL behaviour and controller limits. Use them to validate the phasor model and to study cases the phasor model can't represent, such as phase jumps, weak grids, islanding and TOV.
  • What to ask the OEM for: the short-circuit model for your program and firmware version, the current limit and its sequence split, the I₂ angle behaviour, the response and settling times, any momentary-cessation thresholds, the EMT model with its validation report, and notice of any firmware change that alters these.
Key takeaways
  • IBR fault current is a control decision, typically about 1.0–1.5 pu of rating, set by the OEM current limit. Overcurrent margins over load all but disappear.
  • Under IEEE 2800 the default during LVRT is reactive priority with dual-sequence injection. I₂ should lead V₂ by about 90°–100° for full-converter IBRs (Cl. 7.2.2.3.4; Type III wind is allowed 90°–150°).
  • Current limits force curtailment: active current goes first, then reactive components are reduced together within the priority rules.
  • A phase jump is not a frequency change. Measure frequency over multi-cycle windows and keep PLL-derived instantaneous frequency out of tripping logic.
  • Odessa had several root causes. Every plant and inverter protective function must be shown to stay quiet inside the ride-through envelope, and firmware changes must be revalidated.
  • Grid-forming converters and OEM-specific models change the picture. Base settings on the OEM short-circuit and EMT models for the firmware actually installed.
Assessment

Knowledge check

0/8 answered
  1. Q1
    A 100 MVA BESS and a 100 MVA CTG see the same close-in fault. Which statement is most accurate?
  2. Q2
    Why can a conventional phase overcurrent (51) element at the collector substation fail to detect an internal fault fed only by IBRs?
  3. Q3
    On an unbalanced fault, IEEE 2800-2022 asks full-converter IBRs to inject negative-sequence current that…
  4. Q4
    Using the representative K-factors in the lab (K₁ = K₂ = 2), an SLG fault gives V₁ = 0.72 and V₂ = 0.24 pu with Imax = 1.15 pu. Under reactive priority, roughly how much active current remains?
  5. Q5
    A 25° voltage phase jump is measured by a frequency element using a 1-cycle window at 60 Hz. What apparent frequency excursion does it see?
  6. Q6
    Which list best reflects the causes NERC identified for solar PV reductions in the Odessa disturbances?
  7. Q7
    After an OEM firmware update, disturbance records show the plant's I₂ leading V₂ by 135° during line faults. What is the main concern?
  8. Q8
    Why shouldn't a PV plant be entered in a short-circuit program as a voltage source behind a subtransient reactance?
Mastery challenge

Tune a plant to ride through and support the grid

Using the four labs, produce a settings justification for a 150 MW BESS plant with Imax = 1.15 pu that must ride through an HV SLG fault (V₁ ≈ 0.72, V₂ ≈ 0.24 pu) with a 25° phase jump, followed by a slow voltage recovery.

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